Linear Loop Transformations in Optimising Compilers for Parallel Machines
نویسندگان
چکیده
We present the linear loop transformation framework which is the formal basis for state of the art optimization techniques in restructuring compilers for parallel machines. The framework uniies most existing transformations and provides a systematic set of code generation techniques for arbitrary compound loop transformations. The algebraic representation of the loop structure and its transformation give way to quantitative techniques for optimizing performance on parallel machines. We discuss in detail the techniques for generating the transformed loop and deriving the desired linear transformation.
منابع مشابه
Genetic Compilers : A New Technique for Automatic Parallelisation
In the last three decades a number of compiler transformations for optimising sequential programs for execution on vector or parallel architectures have been implemented. Optimisations for high performance ar-chitectures maximise parallelism and memory locality with transformations based on extensive control and data dependency analysis-with particular emphasis on loop-transformations. Current ...
متن کاملCompilation Techniques for Exploiting Instruction Level Parallelism, a Survey
After the advent of pipelining, the new challenge of architectures since the eighties has been that of issuing and executing multiple instructions in the same clock cycle, i.e. to exploit Instruction Level Parallelism. In order to reach such aim, not only machines must be equipped with parallel data-paths for simultaneous execution of instructions, but, also, compilers need to expose parallelis...
متن کاملAutomatic selection of high-order transformations in the IBM XL FORTRAN compilers
The IBM ASTl optimizer provides the foundation for high-order transformations and automatic shared-memory parallelization in the latest IBM XL FORTRAN (XLF) compilers for RS/6000'" and PowerPC@ uniprocessors and symmetric multiprocessors (SMPs), and for automatic distributed-memory parallelization in the IBM XL High-Performance FORTRAN (XLHPF) compiler for the SP' " distributed-memory multiproc...
متن کاملCompile - Time Minimisation of Load Imbalance in Loop
Parallelising compilers typically need some performance estimation capability in order to evaluate the trade-oos between diierent transformations. Such a capability requires sophisticated techniques for analysing the program and providing quantitative estimates to the compiler's internal cost model. Making use of techniques for symbolic evaluation of the number of iterations in a loop, this pap...
متن کاملChain-based Scheduling: Part I { Loop Transformations and Code Generation Chain-based Scheduling: Part I { Loop Transformations and Code Generation
Chain-based scheduling 1] is an eecient partitioning and scheduling scheme for nested loops on distributed-memory multicomputers. The idea is to take advantage of the regular data dependence structure of a nested loop to overlap and pipeline the communication and computation. Most partitioning and scheduling algorithms proposed for nested loops on multicomputers 1,2,3] are graph algorithms on t...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید
ثبت ناماگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید
ورودعنوان ژورنال:
- Australian Computer Journal
دوره 27 شماره
صفحات -
تاریخ انتشار 1995